Low-Power Noc for High-Performance Soc Design

This resource provides practical knowledge and real examples of how to use NoC in the design of SoC. It explains how to optimize communication through NoC. Employing the UML throughout, the text presents complicated concepts, such as models of computation and communication-computation partitioning, in a manner accessible to laypeople. The authors provide guidelines on how to simplify complex networking theory to design a working chip. In addition, they explore the novel NoC techniques and implementations of the BONE project ... Read More

This resource provides practical knowledge and real examples of how to use NoC in the design of SoC. It explains how to optimize communication through NoC. Employing the UML throughout, the text presents complicated concepts, such as models of computation and communication-computation partitioning, in a manner accessible to laypeople. The authors provide guidelines on how to simplify complex networking theory to design a working chip. In addition, they explore the novel NoC techniques and implementations of the BONE project. Examples of real-time decisions, circuit-level design, systems, and chips give the material a real-world context. Read Less

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  	This is a digital edition of this title. Rent eBook (2 Options) 180 Day Rental: $115.50 (Expires Dec 30, 2024) 365 Day Rental: $136.50 (Expires Jul 03, 2025) Buy eBook Lifetime Access: $210.00 Title: Low-Power Noc for High-Performance Soc Design by Hoi-Jun Yoo; Kangmin Lee; Jun Kyong Kim Publisher: Taylor & Francis Print ISBN: 9781420051728, 1420051725 eText ISBN: 9781351835428 Edition: 2008 1st edition Format: EPUB eBook	$115.50 Rent eBook This is a digital eBook Nothing will be shipped to you Works with web browsers and the VitalSource app on all Windows, Mac, Chromebook, Kindle Fire, iOS, and Android devices Most eBooks are returnable within 14 days of purchase Questions? See our eBook FAQ