Design of Cost-Efficient Interconnect Processing Units: Spidergon Stnoc

Written by leading experts in the field, Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC comprehensively examines the current state-of-the-art and future trends in multiprocessor system-on-chip (MPSoC), in particular network-on-chip (NoC) design. Read More

Written by leading experts in the field, Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC comprehensively examines the current state-of-the-art and future trends in multiprocessor system-on-chip (MPSoC), in particular network-on-chip (NoC) design. Read Less

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  	This is a digital edition of this title. Rent eBook (2 Options) 180 Day Rental: $36.85 (Expires Nov 28, 2024) 365 Day Rental: $43.55 (Expires Jun 01, 2025) Buy eBook Lifetime Access: $66.99 Title: Design of Cost-Efficient Interconnect Processing Units by Marcello Coppola; Miltos D. Grammatikakis; Riccardo Locatelli; Giuseppe Maruccia; Lorenzo Pieralisi Publisher: Taylor & Francis Print ISBN: 9781420044713, 1420044710 eText ISBN: 9781351835824 Edition: 2008 1st edition Format: EPUB eBook	$36.85 Rent eBook This is a digital eBook Nothing will be shipped to you Works with web browsers and the VitalSource app on all Windows, Mac, Chromebook, Kindle Fire, iOS, and Android devices Most eBooks are returnable within 14 days of purchase Questions? See our eBook FAQ